T-Flipflop

T-Flipflop

T-Flipflop(Behavioural Model)

library ieee;
use ieee.std_logic_1164.all;
 entity T_FlipFlop is
  port( T: in std_logic;
        CLK: in std_logic;
        Q: out std_logic);
 end T_FlipFlop;
architecture T_FF of T_FlipFlop is
 signal tmp: std_logic;
  begin
   process (CLK)
    begin
     if CLK='1' then
     if T='0' then
     tmp<= tmp;
     elsif T='1' then
     tmp<= NOT tmp;
     end if;
     end if;
   end process;
   Q<= tmp;
end architecture T_FF;