Octal to Binary Encoder in VHDL

Octal to Binary Encoder in VHDL

Octal to Binary Encoder

library ieee;
use ieee.std_logic_1164.all;
 entity ENCOD8_3 is
  port( D0 : in std_logic;
       D1 : in std_logic;
       D2 : in std_logic;
       D3 : in std_logic;
       D4 : in std_logic;
       D5 : in std_logic;
       D6 : in std_logic;
       D7 : in std_logic;
       A0 : out std_logic;
       A1 : out std_logic;
       A2 : out std_logic);
< b>end entity ENCOD8_3;
architecture ENCOD_8_3 of ENCOD8_3 is
  begin
   A0<= D1 OR D3 OR D5 OR D7;
   A1<= D2 OR D3 OR D6 OR D7;
  A2<= D4 OR D5 OR D6 OR D7;
end architecture ENCOD_8_3;