Full Subtractor

Full Subtractor

FULL SUBTRACTOR – DATA FLOW


library ieee;
use ieee.std_logic_1164.all;
 entity FS is
  port(X,Y,Z : in std_logic;
         D,B : out std_logic);
 end FS;
 architecture F_S of FS is
  begin
   D <= X XOR Y XOR Z;
   B <= ((NOT X) AND Y) OR ((NOT X) AND Z) OR (Y AND Z);
  end F_S;


FULL SUBTRACTOR – BEHAVIOURAL

library ieee;
use ieee.std_logic_1164.all;
  entity FS is
   port (X, Y, Bin : in std_logic;
           Dif, Bout : out std_logic);
  end entity FS;
  architecture F_S of FS is
  begin
   process(X,Y,Bin)
     begin
      if(X='0'and Y='0' and Bin='0') then
      Dif<='0';
      Bout<='0';
      elsif(X='0' and Y='0' and Bin='1') then
      Dif<='1';
      Bout<='1';
      elsif(X='0' and Y='1' and Bin='0') then
      Dif<='1';
      Bout<='1';
      elsif(X='0' and Y='1' and Bin='1') then
      Dif<='0';
      Bout<='1';
      elsif(X='1' and Y='0' and Bin='0') then
      Dif<='1';
      Bout<='0';
      elsif(X='1' and Y='0' and Bin='1') then
      Dif<='0';
      Bout<='0';
      elsif(X='1' and Y='1' and Bin='0') then
      Dif<='0';
      Bout<='0';
      else
      Dif<='1';
      Bout<='1';
      end if;
   end process;
  end architecture F_S;